The present invention relates generally to the field of processors and in particular to a system and method for controlling data prefetching in processors.
Processors use caching to relieve memory-associated processing bottlenecks. Instruction caching works, for example, by using faster-access memory to hold selected portions of a larger set of program instructions stored in slower memory, such as main memory or a higher-level of cache memory.
Instructions present in the cache are thus accessed with lower delays than would be required for access to the slower memory, and processors commonly employ some form of hardware-based instruction prefetching to keep the instruction cache filled with needed lines of instructions from the slower memory. Prefetching places lines of instructions from slower memory into the instruction cache before instructions within those lines are needed.
Hardware-based prefetching also may be applied to data. However, successfully prefetching data can be more difficult than successfully prefetching instructions. For example, data values may be more scattered or spread out in memory than program instructions, making predictive-based prefetching more challenging. As such, data prefetching may or may not improve performance, and the performance of data prefetching may change dramatically during processor operation.
Thus, it is known for example to “filter” prefetch operations. Prefetch filtering represents a “pollution” avoidance mechanism, where the data cache is considered polluted when it contains prefetched data lines that are never used, i.e., data lines that are prefetched but ultimately replaced before ever being accessed (hit). As such, prefetch filtering implies carrying out data prefetching on an ongoing basis but selectively skipping certain data prefetches that otherwise would be carried out absent such filtering.
In more detail, individual data prefetches may or may not be performed in dependence on the applied filtering criteria. The filtering criteria may reflect a prefetching performance history developed, for example, over some range of program execution. However, the determination of appropriate filtering may require undesirable hardware complexity or resource consumption, particularly to yield meaningful performance improvements over data prefetching without filtering.